TY - GEN
T1 - Structurally regular unimodular filter banks
AU - Kumar, Rohit
AU - Chen, Ying Jui
AU - Oraintara, Soontorn
AU - Amaratunga, Kevin
PY - 2004
Y1 - 2004
N2 - In this paper, we present the structural conditions for imposing regularity onto first-order unimodular filter banks (a.k.a. lapped unimodular transforms, LUT). For this purpose, we propose to parameterize non-singular matrices using a special lattice structure by which rational-coefficient unimodular filter banks can readily be designed. We consider two types of LUT factorizations and derive the corresponding structural conditions for regularity. Consequently, regular first-order unimodular filter banks can be designed using unconstrained optimizations, as the proposed structures always guarantee regularity. Design examples of regular first-order unimodular filter banks are presented to illustrate the proposed theory.
AB - In this paper, we present the structural conditions for imposing regularity onto first-order unimodular filter banks (a.k.a. lapped unimodular transforms, LUT). For this purpose, we propose to parameterize non-singular matrices using a special lattice structure by which rational-coefficient unimodular filter banks can readily be designed. We consider two types of LUT factorizations and derive the corresponding structural conditions for regularity. Consequently, regular first-order unimodular filter banks can be designed using unconstrained optimizations, as the proposed structures always guarantee regularity. Design examples of regular first-order unimodular filter banks are presented to illustrate the proposed theory.
UR - https://www.scopus.com/pages/publications/17044392641
M3 - Conference contribution
AN - SCOPUS:17044392641
SN - 0780384342
T3 - 2004 IEEE 11th Digital Signal Processing Workshop and 2nd IEEE Signal Processing Education Workshop
SP - 34
EP - 38
BT - 2004 IEEE 11th Digital Signal Processing Workshop and 2nd IEEE Signal Processing Education Workshop
T2 - 2004 IEEE 11th Digital Signal Processing Workshop and 2nd IEEE Signal Processing Education Workshop
Y2 - 1 August 2004 through 4 August 2004
ER -